Priv.Doz. Dr. Martin Griebl

Contact Information

phone (at my new position in Plattling):

++49 / 9931 / 951-220

fax (at my new position in Plattling):

++49 / 9931 / 951-218

parcel address:

Universität Passau, Innstraße 33, D-94032 Passau

Room 103

letter address:

Universität Passau, D-94030 Passau

e-mail:

griebl@fmi.uni-passau.de

pgp (Pretty Good Privacy):

ElGamal public key for gnupg

Activities and interests

Since I prefer model-based optimizations, the most important technique for my work is parameterized (integer) linear programming, currently extended to non-linear optimization.

All the theoretical results are to be found in the papers; for testing these theoretical results we use our project LooPo in which we implement a prototype of an automatic parallelizer that integrates our model-based program optimizations.

List of Papers (by topics):

Habilitation thesis

• Automatic Parallelization of Loop Programs for Distributed Memory Architectures

Parallelization for the GRID

• Making a Taskfarm Component Parallelize Loops for the Grid [CoreGRID-IW 2006]

Non-linear parameters

• Introducing Non-linear Parameters to the Polyhedron Model [CPC 2004]
  
• Quantifier Elimination in Automatic Loop Parallelization [Journal of Symbolic Computation]
  [A short version is Quantifier Elimination in Automatic Loop Parallelization [A3L 2005]]

For Loops

• Code Generation for Distributed Memory:
  Automatic Code Generation for Distributed Memory Architectures in the Polytope Model [HIPS 2006]
• Code Generation:
  Code Generation in the Polytope Model [PACT'98]
• Index Set Splitting:
  Index Set Splitting [TechRep 9908]
  On Index Set Splitting [PACT'99]
  Index Set Splitting [IJPP 2000]
  
• Placement:
  Forward Communication Only Placements and their Use for Parallel Program Construction [LCPC'02]

Tiling

• Brief overview:
  On Tiling Space-Time Mapped Loop Nests [SPAA 2001]
  
• Tiling space dimensions:
  The Minimal Number of Communication Startups when Tiling Spce-Time Mapped Programs [CPC 2001]
  
• Tiling time dimensions:
  On the Mechanical Tiling of Space-Time Mapped Loop Nests [TechRep 0009]
  
• Combined description of tiling space and time:
  Space-time mapping and tiling: a helpful combination [CCPE 2004]
  

HPF Compilation

• Problems with HPF:
  Issues of the Automatic Generation of HPF Loop Programs [LCPC 2000]
  

Loop Carried Code Placement

• First presentation of the principal technique:
  Loop-Carried Code Placement [EuroPar 2001]
  
• An extended version:
  A Closer Look a t Loop-Carried Code Placement [PARS 2001]
• On which processors shall the temporaries introduced by LCCP be computed?:
  Replicated Placements in the Polyhedron Model [Euro-Par 2003]
  

Array Dataflow Analysis

• Explicitly Parallel Programs:
  Array Dataflow Analysis for Explicitly Parallel Programs [PPL 97]
• Recursive Structures:
  Data Flow Analysis of Recursive Structures [CPC'96]
• Unstructured Programs:
  A Precise Fixpoint Reaching Definition Analysis for Arrays [LCPC'99]

Functional Programming

• Transfer of the ideas:
  Applicability of the Polytope Model to Functional Programs [GI WFLP'98]

LooPo

• Overview:
  The Loop Parallelizer LooPo [CPC'96]
• Very brief description:
  The Loop Parallelizer LooPo - Announcement [LCPC'96]

While Loops

• PhD thesis:
  The Mechanical Parallelization of Loop Nests Containing while Loops

• First ideas and scannability:
  On the Space-Time Mapping of WHILE-Loops
  [Preliminary version was MIP-Bericht 9304, July 1993]
• Signaling scheme for distributed memory:
  On Scanning Space-Time Mapped WHILE Loops
  
• Overview:
  On the Parallelization of Loop Nests Containing while Loops
  Classifying Loops for Space-Time Mapping
• Counter Scheme for shared memory:
  Generation of Synchronous Code for Automatic Parallelization of while Loops
  A Scheme for Detecting the Termination of a Parallel Loop Nest [PARS'98]