Minisymposiums
In the rapidly evolving landscape of data-intensive applications across diverse fields such as genomics, analytics, and artificial intelligence (AI), traditional compute-centric architectures are increasingly reaching their limits. The bottleneck often lies in the communication between main memory and CPUs, which is constrained by a narrow bus that suffers from high latency and limited bandwidth, with a significant portion of energy consumption attributed to DRAM data movement. A promising solution to these challenges is the integration of robust computing capabilities directly onto the DRAM memory die, known as Processing-in-Memory (PIM) DRAM.
The field of PIM is experiencing dynamic progress, highlighted by efforts such as SAMSUNG's HPM-PIM and SK Hynix's AiM Accelerator. These developments underscore the growing momentum in PIM, although it's important to note that these products are not yet commercialized in real hardware. In this context, UPMEM stands out as a pioneer with the first commercially available PIM architecture. UPMEM's PIM modules, which seamlessly integrate in place of standard DIMMs, bring massively parallel computing capabilities to the table. Each DRAM chip is equipped with 8 general purpose processors (DPUs) that provide fast access to DRAM banks. In a standard server configuration, 2560 DPUs can accelerate applications by an order of magnitude.
The ABUMPIMP Symposium provides a unique platform to delve into the use of this cutting-edge technology. It aims to showcase how different applications can use PIM to their advantage and the intricacies involved in developing PIM applications. This event is a unique opportunity for anyone looking to accelerate data-intensive applications, offering insights from both industrial and academic researchers who have first-hand experience with UPMEM technology. Attendees will leave with a deeper understanding of this technology's value and practical insights into its application potential.
Federated machine learning has opened new avenues for privacy-preserving data analysis. Instead of pooling data in a central location, different data owners or IoT devices keep data local and training is decentralized where only model parameters are exchanged. It is an active area of research where most of the current efforts focus on the algorithmic details and communication overhead required to train accurate models. Despite much progress in the field, production-grade federated machine learning frameworks that deal with fundamental properties such as scalability, fault tolerance, security and performance in geographically distributed settings have not been available to the ML-engineer. To address this, Scaleout Systems and SciML at Uppsala University developed FEDn. FEDn adopts a map-reduce architecture, comprising distributed clients, combiners for aggregation, and a single reducer for global model building. In this session, we provide hands-on experience with FEDn and share experimental results from large-scale, heterogeneous environments.
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